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NXP Semiconductors /LPC43xx /USB0 /ASYNCLISTADDR

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Interpret as ASYNCLISTADDR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RESERVED0ASYBASE31_5

Description

Address of endpoint list in memory

Fields

RESERVED

Reserved
ASYBASE31_5

Link pointer (Low) LPL These bits correspond to memory address signals 31:5, respectively. This field may only reference a Queue Head (OH).

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data